The present invention relates to the field of semiconductor processing and more particularly to a method of forming field effect transistors.
A current process of fabricating an N channel metal-oxide-semiconductor field effect transistor is illustrated in FIGS. 1a through 1g. The process includes steps to create a lightly doped drain region (LDD) that is intended to reduce hot carrier damage to the transistor by reducing the maximum lateral electric field.
FIG. 1a is an illustration of a cross sectional elevation view of P type silicon substrate 101, upon which gate oxide 102 has been grown and gate electrode 103 has been formed. Gate electrode 103 is formed by depositing then patterning a layer of polysilicon on gate oxide 102. FIG. 1b shows the transistor after a step commonly referred to as poly reox, in which oxide film 104 is grown on gate electrode 103. FIG. 1c shows Nxe2x88x92 tip regions 105 which are formed by a low dose N type ion implant that is masked by gate electrode 103 and oxide film 104. Subsequent thermal processing steps cause Nxe2x88x92 tip regions 105 to diffuse slightly under the sidewall of gate electrode 103. FIG. 1d shows the transistor after oxide film 106 and conformal nitride film 107 are deposited on the entire structure. FIG. 1e shows the transistor after an anisotropic etch that removes nitride film 107 from everywhere except the sidewall of gate electrode 103. The remaining nitride 108 is commonly referred to as the spacers. FIG. 1f shows N+ source and drain regions 109 which are formed by a high dose ion implant that is blocked by gate electrode 103 and spacers 108. Subsequent thermal processing steps cause N+ source and drain regions 109 to diffuse slightly under spacers 108. FIG. 1g shows the transistor after oxide films 106 and 104 have been removed from the top surface of gate electrode 103, and oxide films 106, 104, and 102 have been removed from the top surfaces of N+ regions 109, in preparation for silicidation. The remainder of oxide films 106 and 104 on the sidewalls of gate electrode 103 is commonly referred to as the side oxide.
Although the LDD has been found to make submicron transistors less susceptible to hot carrier damage, transistor dimensions continue to decrease so hot carrier damage continues to decrease device reliability. One approach to further decrease a transistor""s susceptibility to hot carrier damage is to use a re-oxided nitrided oxide (RNO) as the gate oxide. However, with this approach the carrier mobility in the channel is reduced, resulting in a degradation in device performance. In IEEE IEDM, Volume 91, pp. 649-652 (1991), Kusunoki et al. propose the structure of FIG. 2 to improve the hot carrier resistance without degrading performance. Side oxide 201 is an RNO film that not only covers the sidewalls of gate electrode 202, but also replaces gate oxide 203 between LDD region 204 and spacer 205. One disadvantage of this approach is the difficulty in overcoming manufacturability problems in the RNO process. For example, if excessive re-oxidation takes place the thickness of side oxide 201 will increase, causing the lateral dimension of LDD region 204 to increase. The increase in the lateral dimension of LDD region 204 results in an increase in the series resistance of the transistor, which in turn results in decreased drive current and decreased device performance.
Thus, what is desired is a more manufacturable method for fabricating a transistor with increased resistance to hot carrier degradation.
A novel set of steps in a method of fabricating a field effect transistor is disclosed. First, a gate electrode is formed. Then, an oxide is formed on the sidewalls of the gate electrode. Next, the oxide is nitridized. Finally, the oxide is annealed.